AMD's Zen 6 Epyc Venice Takes Aim at Nvidia Vera With a Bold 330% Per-Rack Performance Claim

AMD's Headline Number: 3.3x Nvidia Vera Per Rack

Here's the claim that's getting everyone's attention. AMD says its next data center CPU platform will deliver 3.3 times the per-rack performance of Nvidia's Vera. That's not a modest "we're a little faster" boast. That's Team Red planting a flag.

And the timing is the interesting part. Nvidia-approved results had already suggested Vera outperforms most AMD Epyc chips. So AMD didn't just shrug. The company published its own performance projections and built them, in part, on the very benchmark figures that had favored Nvidia in the first place. Kind of a "fine, let's use your numbers and see how this plays out" move.

The way AMD got to 3.3x wasn't a single magic figure either. The company compared core counts per CPU, node power, nodes per rack, and a 100kW rack power budget. Stack all of that up, and that's where the per-rack claim comes from.

What Epyc Venice Actually Brings to the Fight

So what is this chip? AMD's upcoming server platform is called Venice, and it recently entered production. It's on track to launch later this year, which means this isn't a far-off promise. It's close.

Venice is built on AMD's Zen 6 architecture, and the spec sheet is genuinely big: up to 256 cores and 512 threads per chip. That's a lot of horsepower in one socket.

The other headline is the manufacturing leap. Venice marks AMD's move to TSMC's 2nm process. And here's the part worth sitting with for a second: AMD is jumping straight there from the 4nm Epyc Turin, skipping the 3nm node entirely. That's an aggressive cadence.

Compared to Turin, AMD is projecting:

• A 70% overall improvement in performance and efficiency
• A 30% increase in thread density

Those are big generational jumps, and they're the foundation under the flashier per-rack claim.

Where the Vera Comparison Actually Comes From

Now, to make sense of AMD's numbers, you have to know what it's measuring against. Nvidia formally launched its Vera server CPU at GTC in March. It's an Arm-based SoC packing 88 cores and 176 threads.

And Vera is no slouch. In recent testing, Phoronix described it as the most capable Arm processor it has ever tested, outclassing Intel Xeon and AMD Epyc across most workloads. That's a real endorsement.

But there's a caveat, and it's a big one. Those tests were run at Nvidia's headquarters and came with several restrictions to get Nvidia's sign-off. So while the results look strong, they weren't exactly a neutral, hands-off evaluation.

That context matters because AMD turned around and drew on those same Phoronix figures when building the methodology for its Venice projections. So both sides are, in a sense, leaning on the same set of numbers and reaching very different conclusions.

It's Not Just Per Rack: The Per-Core Claims

The 3.3x figure grabs headlines, but AMD is also fighting on per-core performance, which is a tougher arena.

The company claims a 64-core Venice chip can beat Vera by 27%, while the 96-core variant edges it by 11%. So it's not only winning on brute density. AMD is arguing it can compete core-for-core, too.

To put the per-rack picture in perspective, AMD also slotted in a couple of comparison points against Vera's output:

Look at that lineup and you can see what AMD is doing. Even its current-gen Turin is positioned well ahead of Vera by this math, and Venice is meant to widen the gap further.

Why This Is Important for AI Workloads

Here's the bigger story underneath the spec war. Both Venice and Vera are aimed squarely at AI workloads. That's the battleground.

AMD's argument is that Venice's higher core counts will translate into a meaningful advantage for agentic AI deployments specifically. More cores, more parallel work, more throughput for the kind of AI tasks that are eating data centers right now.

It's a logical pitch. But it's still a pitch. The honest truth is that the real performance gap won't be clear until independent benchmarks show up. Vendor projections are useful for understanding intent and direction, but they're not the final word. So treat the 3.3x with curiosity, not certainty.

What's Already Coming After Venice

And AMD isn't waiting around. Even while it's promoting Venice's theoretical performance, the company is already hinting at the next chapter.

That next chip is called "Verano," and it's set to be AMD's first CPU designed specifically for AI infrastructure. Verano is expected to introduce the Zen 7 architecture.

Supply chain reports go a step further, suggesting Zen 7 will target TSMC's A14 node, a 1.4nm-class process. If that holds, it'd mark AMD's entry into the angstrom era and push performance and efficiency gains beyond what 2nm can offer. Worth noting, though: AMD hasn't confirmed those details. So file that one under "promising rumor" for now.