# Micron 2027 Roadmap: DDR6, 1TB RDIMMs, and 400-Layer NAND

> Markdown version of an Informer Tech article. Canonical HTML page: https://www.informertech.com/post/micron-2027-ddr6-1tb-rdimm-nand-roadmap
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- **Canonical URL:** https://www.informertech.com/post/micron-2027-ddr6-1tb-rdimm-nand-roadmap
- **Publisher:** Informer Tech (https://www.informertech.com/)
- **Category:** Industry News
- **Author:** Mateo Alvarez
- **Published:** 2026-10-24
- **Description:** Micron’s 2027 roadmap includes DDR6, 1TB RDIMMs, LPDDR6, vHBM, and G11 NAND with more than 400 layers.

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Micron has outlined plans for next-generation memory and storage products, including DDR6, LPDDR6, high-capacity RDIMMs, HBM developments, and G11 NAND flash. The roadmap centers on products intended for AI infrastructure and data center workloads, with several technologies expected to move into volume production during the second half of 2027.

The company’s plans also include a new 1&delta;, or 1-Delta, process node, which follows its 1&gamma;, or 1-Gamma, node. Micron says the roadmap will introduce changes in DRAM design, manufacturing methods, memory stacking, and NAND density.

## Micron DDR6 Targets More Than Double DDR5 Bandwidth

Micron says its upcoming DDR6 memory standard will offer more than twice the bandwidth of DDR5. But DDR6 is not being positioned as a direct replacement for DDR5 in client PCs.

Instead, Micron is targeting DDR6 at high-reliability server memory for AI data centers. That focus places the technology alongside the growing demand for infrastructure built around AI workloads rather than conventional desktop and laptop memory upgrades.

Micron expects its 1-Delta node to enter volume production in the second half of 2027. The company has not announced an official launch date for DDR6.

## The 1-Delta DRAM Node Supports DDR6 and LPDDR6

The 1-Delta node is the follow-up to Micron’s 1-Gamma node. According to Micron, it uses angstrom-level process control and an HKMG CMOS structure.

For advanced DRAM products, Micron says 1-Delta is expected to provide roughly 25% higher bit density than its predecessor. The node will support next-generation standards including DDR6 and LPDDR6.

Micron has also indicated that future DRAM products will move to 6F&sup2;, or 6-Feature-Square, DRAM rather than 4F&sup2;. The company cited cost, complexity, and capacitor pitch limits as factors that significantly reduce the scalability of 4F&sup2;.

## 1TB RDIMMs Are Planned for High-Density AI Workloads

Micron previously demonstrated a 512GB DDR5 RDIMM operating at 9,200MT/s in September 2026. Its next-generation technology roadmap now calls for 1TB RDIMMs designed for high-density AI workloads.

The company says the 1TB modules will be the industry’s highest-capacity RDIMMs when they enter production. No official production date for the modules was provided.

For servers handling dense memory requirements, capacity is a major part of the roadmap. Micron’s plan combines its upcoming DRAM node with higher-capacity registered memory modules aimed at AI data centers.

## LPDDR6 Is Expected to Improve Power Efficiency

Micron says LPDDR6 will provide 35% better power efficiency than LPDDR5. The company also says efficiency improvements may be even greater at certain densities.

Scott DeBoer, Micron’s president and chief technology and products officer, said the company is working with a range of partners, including Meta, to deploy LPDDR6 memory in AI data centers.

That deployment focus follows the broader direction of Micron’s roadmap: memory products designed around data center requirements, capacity, bandwidth, and energy use.

## Future DRAM Plans Include Wafer Bonding and High-NA EUV

Micron says its next-generation DRAM products will use wafer bonding and High-NA EUV. The company may later move to newer materials.

The roadmap also includes work on 3D DRAM as a longer-term alternative. In addition, Micron is introducing “vHBM,” a vertically stacked design that places memory directly on top of the compute die.

Micron says vHBM is intended to improve efficiency in next-generation HBM chips by increasing bandwidth per watt.

## G11 NAND Will Use More Than 400 Layers

On the storage side, Micron has outlined G11 NAND flash with more than 400 layers. Compared with G9, the new NAND product is targeted to provide:

- Twice the bit density
- 1.5 times the I/O speed
- More than 25% lower energy per data transfer

Micron expects G11 NAND to enter production in the second half of 2027. The company has not announced an official launch date.

The NAND roadmap sits alongside Micron’s DRAM plans, with the company outlining higher-density storage and lower energy use per data transfer for its next-generation flash products.

## Micron’s 2027 Memory and Storage Roadmap at a Glance

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<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="e8ideis20ls" data-col-id="flpp7zrpiui">
 

**Technology**

 

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<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="e8ideis20ls" data-col-id="v0vorj11vhm">
 

**Micron’s stated roadmap details**

 

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<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="ori4rn15wbl" data-col-id="flpp7zrpiui">
 

1-Delta DRAM node

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="ori4rn15wbl" data-col-id="v0vorj11vhm">
 

Roughly 25% higher bit density than 1-Gamma

 

</td>
</tr>
<tr class="ql-table-row" data-row-id="r8500gur4le">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="r8500gur4le" data-col-id="flpp7zrpiui">
 

DDR6

 

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More than twice the bandwidth of DDR5

 

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<tr class="ql-table-row" data-row-id="eyhrs2snimu">
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DDR6 positioning

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="eyhrs2snimu" data-col-id="v0vorj11vhm">
 

High-reliability server memory for AI data centers

 

</td>
</tr>
<tr class="ql-table-row" data-row-id="9m0p1dswkx">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="9m0p1dswkx" data-col-id="flpp7zrpiui">
 

1TB RDIMMs

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="9m0p1dswkx" data-col-id="v0vorj11vhm">
 

Planned for high-density AI workloads

 

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<tr class="ql-table-row" data-row-id="3xil8wt0p9o">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="3xil8wt0p9o" data-col-id="flpp7zrpiui">
 

LPDDR6

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="3xil8wt0p9o" data-col-id="v0vorj11vhm">
 

35% better power efficiency than LPDDR5

 

</td>
</tr>
<tr class="ql-table-row" data-row-id="423higem4mz">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="423higem4mz" data-col-id="flpp7zrpiui">
 

Future DRAM

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="423higem4mz" data-col-id="v0vorj11vhm">
 

6F&sup2; DRAM, wafer bonding, and High-NA EUV

 

</td>
</tr>
<tr class="ql-table-row" data-row-id="t4y1s0l38po">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="t4y1s0l38po" data-col-id="flpp7zrpiui">
 

vHBM

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="t4y1s0l38po" data-col-id="v0vorj11vhm">
 

Memory stacked directly on top of the compute die

 

</td>
</tr>
<tr class="ql-table-row" data-row-id="xcpkbs6ojmh">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="xcpkbs6ojmh" data-col-id="flpp7zrpiui">
 

G11 NAND

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="xcpkbs6ojmh" data-col-id="v0vorj11vhm">
 

More than 400 layers, twice G9 bit density

 

</td>
</tr>
<tr class="ql-table-row" data-row-id="mkqm4vsq5b">
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="mkqm4vsq5b" data-col-id="flpp7zrpiui">
 

G11 NAND efficiency

 

</td>
<td class="ql-table-cell" colspan="1" rowspan="1" data-row-id="mkqm4vsq5b" data-col-id="v0vorj11vhm">
 

More than 25% lower energy per data transfer than G9

 

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</tbody>
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## FAQ

### When will Micron’s 1-Delta node enter volume production?

Micron expects 1-Delta to enter volume production in the second half of 2027. The company has not provided an official DDR6 launch date.

### Is Micron DDR6 intended for consumer PCs?

Micron is positioning DDR6 as high-reliability server memory for AI data centers. It is not being presented as a direct successor to DDR5 for client PCs.

### What improvements does Micron expect from G11 NAND?

Compared with G9, Micron targets twice the bit density, 1.5 times the I/O speed, and more than 25% lower energy per data transfer. G11 NAND will use more than 400 layers.
